This book presents the hardware implementation of control algorithms represented by graph-schemes of algorithm. It includes new methods of logic synthesis and optimization for logic circuits of Mealy and Moore FSMs oriented on both ASIC and FPLD.

Hardwired Interpretation of Control Algorithms.- Matrix Realization of Control Units.- Evolution of Programmable Logic.- Optimization for Logic Circuit of Mealy FSM.- Optimization for Logic Circuit of Moore FSM.- FSM Synthesis with Transformation of GSA.- FSM Synthesis with Object Code Transformation.- FSM Synthesis with Elementary Chains.- Conclusion.